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path: root/fw/fe310/eos/dev/drv/ili9806e.c
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Diffstat (limited to 'fw/fe310/eos/dev/drv/ili9806e.c')
-rw-r--r--fw/fe310/eos/dev/drv/ili9806e.c557
1 files changed, 276 insertions, 281 deletions
diff --git a/fw/fe310/eos/dev/drv/ili9806e.c b/fw/fe310/eos/dev/drv/ili9806e.c
index ff7a8cb..45aabb7 100644
--- a/fw/fe310/eos/dev/drv/ili9806e.c
+++ b/fw/fe310/eos/dev/drv/ili9806e.c
@@ -2,15 +2,10 @@
#include <stdint.h>
#include <string.h>
-#include "eos.h"
-
-#include "soc/spi.h"
-#include "soc/spi9bit.h"
-#include "soc/timer.h"
-
+#include "platform.h"
#include "ili9806e.h"
-#ifdef EOS_DEBUG
+#ifdef DRV_DEBUG
#include <stdio.h>
#endif
@@ -18,419 +13,419 @@ int ili9806e_init(void) {
int rv;
uint8_t chip_id[3];
- eos_spi_cs_set();
+ drv_spi_cs_set();
/* LCD Setting */
- eos_spi9bit_write(0, 0xFF); // change to Page 1 CMD
- eos_spi9bit_write(1, 0xFF);
- eos_spi9bit_write(1, 0x98);
- eos_spi9bit_write(1, 0x06);
- eos_spi9bit_write(1, 0x04);
- eos_spi9bit_write(1, 0x01);
+ drv_spi9bit_write(0, 0xFF); // change to Page 1 CMD
+ drv_spi9bit_write(1, 0xFF);
+ drv_spi9bit_write(1, 0x98);
+ drv_spi9bit_write(1, 0x06);
+ drv_spi9bit_write(1, 0x04);
+ drv_spi9bit_write(1, 0x01);
- // eos_spi9bit_write(0, 0x08); // Output SDA
- // eos_spi9bit_write(1, 0x10);
+ // drv_spi9bit_write(0, 0x08); // Output SDA
+ // drv_spi9bit_write(1, 0x10);
- eos_spi9bit_write(0, 0xFE); // enable read
- eos_spi9bit_write(1, 0x81);
+ drv_spi9bit_write(0, 0xFE); // enable read
+ drv_spi9bit_write(1, 0x81);
- eos_spi9bit_write(0, 0x00); // RDID4
- eos_spi9bit_read(&chip_id[0]);
+ drv_spi9bit_write(0, 0x00); // RDID4
+ drv_spi9bit_read(&chip_id[0]);
- eos_spi9bit_write(0, 0x01);
- eos_spi9bit_read(&chip_id[1]);
+ drv_spi9bit_write(0, 0x01);
+ drv_spi9bit_read(&chip_id[1]);
- eos_spi9bit_write(0, 0x02);
- eos_spi9bit_read(&chip_id[2]);
+ drv_spi9bit_write(0, 0x02);
+ drv_spi9bit_read(&chip_id[2]);
-#ifdef EOS_DEBUG
+#ifdef DRV_DEBUG
printf("LCD CHIP ID: %.2x%.2x%.2x\n", chip_id[0], chip_id[1], chip_id[2]);
#endif
- eos_spi9bit_write(0, 0xFE); // disable read
- eos_spi9bit_write(1, 0x00);
+ drv_spi9bit_write(0, 0xFE); // disable read
+ drv_spi9bit_write(1, 0x00);
if (memcmp(chip_id, "\x98\x06\x04", sizeof(chip_id))) {
- eos_spi_cs_clear();
- return EOS_ERR_NOTFOUND;
+ drv_spi_cs_clear();
+ return DRV_ERR_NOTFOUND;
}
- eos_spi9bit_write(0, 0x20); // set DE/VSYNC mode
- eos_spi9bit_write(1, 0x00);
+ drv_spi9bit_write(0, 0x20); // set DE/VSYNC mode
+ drv_spi9bit_write(1, 0x00);
- eos_spi9bit_write(0, 0x21); // DE = 1 Active
- eos_spi9bit_write(1, 0x01);
+ drv_spi9bit_write(0, 0x21); // DE = 1 Active
+ drv_spi9bit_write(1, 0x01);
- eos_spi9bit_write(0, 0x30); // resolution setting 480 X 854
- eos_spi9bit_write(1, 0x01);
+ drv_spi9bit_write(0, 0x30); // resolution setting 480 X 854
+ drv_spi9bit_write(1, 0x01);
- eos_spi9bit_write(0, 0x31); // inversion setting 2-dot
- eos_spi9bit_write(1, 0x00);
+ drv_spi9bit_write(0, 0x31); // inversion setting 2-dot
+ drv_spi9bit_write(1, 0x00);
- eos_spi9bit_write(0, 0x40); // BT AVDD,AVDD
- eos_spi9bit_write(1, 0x16);
+ drv_spi9bit_write(0, 0x40); // BT AVDD,AVDD
+ drv_spi9bit_write(1, 0x16);
- eos_spi9bit_write(0, 0x41);
- eos_spi9bit_write(1, 0x33); // 22
+ drv_spi9bit_write(0, 0x41);
+ drv_spi9bit_write(1, 0x33); // 22
- eos_spi9bit_write(0, 0x42);
- eos_spi9bit_write(1, 0x03); // VGL=DDVDH+VCIP-DDVDL, VGH=2DDVDL-VCIP
+ drv_spi9bit_write(0, 0x42);
+ drv_spi9bit_write(1, 0x03); // VGL=DDVDH+VCIP-DDVDL, VGH=2DDVDL-VCIP
- eos_spi9bit_write(0, 0x43);
- eos_spi9bit_write(1, 0x09); // set VGH clamp level
+ drv_spi9bit_write(0, 0x43);
+ drv_spi9bit_write(1, 0x09); // set VGH clamp level
- eos_spi9bit_write(0, 0x44);
- eos_spi9bit_write(1, 0x06); // set VGL clamp level
+ drv_spi9bit_write(0, 0x44);
+ drv_spi9bit_write(1, 0x06); // set VGL clamp level
- eos_spi9bit_write(0, 0x50); // VREG1
- eos_spi9bit_write(1, 0x88);
+ drv_spi9bit_write(0, 0x50); // VREG1
+ drv_spi9bit_write(1, 0x88);
- eos_spi9bit_write(0, 0x51); // VREG2
- eos_spi9bit_write(1, 0x88);
+ drv_spi9bit_write(0, 0x51); // VREG2
+ drv_spi9bit_write(1, 0x88);
- eos_spi9bit_write(0, 0x52); // flicker MSB
- eos_spi9bit_write(1, 0x00);
+ drv_spi9bit_write(0, 0x52); // flicker MSB
+ drv_spi9bit_write(1, 0x00);
- eos_spi9bit_write(0, 0x53); // flicker LSB
- eos_spi9bit_write(1, 0x49); // VCOM
+ drv_spi9bit_write(0, 0x53); // flicker LSB
+ drv_spi9bit_write(1, 0x49); // VCOM
- eos_spi9bit_write(0, 0x55); // flicker
- eos_spi9bit_write(1, 0x49);
+ drv_spi9bit_write(0, 0x55); // flicker
+ drv_spi9bit_write(1, 0x49);
- eos_spi9bit_write(0, 0x60);
- eos_spi9bit_write(1, 0x07);
+ drv_spi9bit_write(0, 0x60);
+ drv_spi9bit_write(1, 0x07);
- eos_spi9bit_write(0, 0x61);
- eos_spi9bit_write(1, 0x00);
+ drv_spi9bit_write(0, 0x61);
+ drv_spi9bit_write(1, 0x00);
- eos_spi9bit_write(0, 0x62);
- eos_spi9bit_write(1, 0x07);
+ drv_spi9bit_write(0, 0x62);
+ drv_spi9bit_write(1, 0x07);
- eos_spi9bit_write(0, 0x63);
- eos_spi9bit_write(1, 0x00);
+ drv_spi9bit_write(0, 0x63);
+ drv_spi9bit_write(1, 0x00);
/* Gamma Setting */
- eos_spi9bit_write(0, 0xA0); // positive Gamma
- eos_spi9bit_write(1, 0x00);
+ drv_spi9bit_write(0, 0xA0); // positive Gamma
+ drv_spi9bit_write(1, 0x00);
- eos_spi9bit_write(0, 0xA1);
- eos_spi9bit_write(1, 0x09);
+ drv_spi9bit_write(0, 0xA1);
+ drv_spi9bit_write(1, 0x09);
- eos_spi9bit_write(0, 0xA2);
- eos_spi9bit_write(1, 0x11);
+ drv_spi9bit_write(0, 0xA2);
+ drv_spi9bit_write(1, 0x11);
- eos_spi9bit_write(0, 0xA3);
- eos_spi9bit_write(1, 0x0B);
+ drv_spi9bit_write(0, 0xA3);
+ drv_spi9bit_write(1, 0x0B);
- eos_spi9bit_write(0, 0xA4);
- eos_spi9bit_write(1, 0x05);
+ drv_spi9bit_write(0, 0xA4);
+ drv_spi9bit_write(1, 0x05);
- eos_spi9bit_write(0, 0xA5);
- eos_spi9bit_write(1, 0x08);
+ drv_spi9bit_write(0, 0xA5);
+ drv_spi9bit_write(1, 0x08);
- eos_spi9bit_write(0, 0xA6);
- eos_spi9bit_write(1, 0x06);
+ drv_spi9bit_write(0, 0xA6);
+ drv_spi9bit_write(1, 0x06);
- eos_spi9bit_write(0, 0xA7);
- eos_spi9bit_write(1, 0x04);
+ drv_spi9bit_write(0, 0xA7);
+ drv_spi9bit_write(1, 0x04);
- eos_spi9bit_write(0, 0xA8);
- eos_spi9bit_write(1, 0x09);
+ drv_spi9bit_write(0, 0xA8);
+ drv_spi9bit_write(1, 0x09);
- eos_spi9bit_write(0, 0xA9);
- eos_spi9bit_write(1, 0x0C);
+ drv_spi9bit_write(0, 0xA9);
+ drv_spi9bit_write(1, 0x0C);
- eos_spi9bit_write(0, 0xAA);
- eos_spi9bit_write(1, 0x15);
+ drv_spi9bit_write(0, 0xAA);
+ drv_spi9bit_write(1, 0x15);
- eos_spi9bit_write(0, 0xAB);
- eos_spi9bit_write(1, 0x08);
+ drv_spi9bit_write(0, 0xAB);
+ drv_spi9bit_write(1, 0x08);
- eos_spi9bit_write(0, 0xAC);
- eos_spi9bit_write(1, 0x0F);
+ drv_spi9bit_write(0, 0xAC);
+ drv_spi9bit_write(1, 0x0F);
- eos_spi9bit_write(0, 0xAD);
- eos_spi9bit_write(1, 0x12);
+ drv_spi9bit_write(0, 0xAD);
+ drv_spi9bit_write(1, 0x12);
- eos_spi9bit_write(0, 0xAE);
- eos_spi9bit_write(1, 0x09);
+ drv_spi9bit_write(0, 0xAE);
+ drv_spi9bit_write(1, 0x09);
- eos_spi9bit_write(0, 0xAF);
- eos_spi9bit_write(1, 0x00);
+ drv_spi9bit_write(0, 0xAF);
+ drv_spi9bit_write(1, 0x00);
- eos_spi9bit_write(0, 0xC0); // negative Gamma
- eos_spi9bit_write(1, 0x00);
+ drv_spi9bit_write(0, 0xC0); // negative Gamma
+ drv_spi9bit_write(1, 0x00);
- eos_spi9bit_write(0, 0xC1);
- eos_spi9bit_write(1, 0x09);
+ drv_spi9bit_write(0, 0xC1);
+ drv_spi9bit_write(1, 0x09);
- eos_spi9bit_write(0, 0xC2);
- eos_spi9bit_write(1, 0x10);
+ drv_spi9bit_write(0, 0xC2);
+ drv_spi9bit_write(1, 0x10);
- eos_spi9bit_write(0, 0xC3);
- eos_spi9bit_write(1, 0x0C);
+ drv_spi9bit_write(0, 0xC3);
+ drv_spi9bit_write(1, 0x0C);
- eos_spi9bit_write(0, 0xC4);
- eos_spi9bit_write(1, 0x05);
+ drv_spi9bit_write(0, 0xC4);
+ drv_spi9bit_write(1, 0x05);
- eos_spi9bit_write(0, 0xC5);
- eos_spi9bit_write(1, 0x08);
+ drv_spi9bit_write(0, 0xC5);
+ drv_spi9bit_write(1, 0x08);
- eos_spi9bit_write(0, 0xC6);
- eos_spi9bit_write(1, 0x06);
+ drv_spi9bit_write(0, 0xC6);
+ drv_spi9bit_write(1, 0x06);
- eos_spi9bit_write(0, 0xC7);
- eos_spi9bit_write(1, 0x04);
+ drv_spi9bit_write(0, 0xC7);
+ drv_spi9bit_write(1, 0x04);
- eos_spi9bit_write(0, 0xC8);
- eos_spi9bit_write(1, 0x08);
+ drv_spi9bit_write(0, 0xC8);
+ drv_spi9bit_write(1, 0x08);
- eos_spi9bit_write(0, 0xC9);
- eos_spi9bit_write(1, 0x0C);
+ drv_spi9bit_write(0, 0xC9);
+ drv_spi9bit_write(1, 0x0C);
- eos_spi9bit_write(0, 0xCA);
- eos_spi9bit_write(1, 0x14);
+ drv_spi9bit_write(0, 0xCA);
+ drv_spi9bit_write(1, 0x14);
- eos_spi9bit_write(0, 0xCB);
- eos_spi9bit_write(1, 0x08);
+ drv_spi9bit_write(0, 0xCB);
+ drv_spi9bit_write(1, 0x08);
- eos_spi9bit_write(0, 0xCC);
- eos_spi9bit_write(1, 0x0F);
+ drv_spi9bit_write(0, 0xCC);
+ drv_spi9bit_write(1, 0x0F);
- eos_spi9bit_write(0, 0xCD);
- eos_spi9bit_write(1, 0x11);
+ drv_spi9bit_write(0, 0xCD);
+ drv_spi9bit_write(1, 0x11);
- eos_spi9bit_write(0, 0xCE);
- eos_spi9bit_write(1, 0x09);
+ drv_spi9bit_write(0, 0xCE);
+ drv_spi9bit_write(1, 0x09);
- eos_spi9bit_write(0, 0xCF);
- eos_spi9bit_write(1, 0x00);
+ drv_spi9bit_write(0, 0xCF);
+ drv_spi9bit_write(1, 0x00);
- eos_spi9bit_write(0, 0xFF); // change to Page 6 CMD for GIP timing
- eos_spi9bit_write(1, 0xFF);
- eos_spi9bit_write(1, 0x98);
- eos_spi9bit_write(1, 0x06);
- eos_spi9bit_write(1, 0x04);
- eos_spi9bit_write(1, 0x06);
+ drv_spi9bit_write(0, 0xFF); // change to Page 6 CMD for GIP timing
+ drv_spi9bit_write(1, 0xFF);
+ drv_spi9bit_write(1, 0x98);
+ drv_spi9bit_write(1, 0x06);
+ drv_spi9bit_write(1, 0x04);
+ drv_spi9bit_write(1, 0x06);
- eos_spi9bit_write(0, 0x00);
- eos_spi9bit_write(1, 0x20);
+ drv_spi9bit_write(0, 0x00);
+ drv_spi9bit_write(1, 0x20);
- eos_spi9bit_write(0, 0x01);
- eos_spi9bit_write(1, 0x0A);
+ drv_spi9bit_write(0, 0x01);
+ drv_spi9bit_write(1, 0x0A);
- eos_spi9bit_write(0, 0x02);
- eos_spi9bit_write(1, 0x00);
+ drv_spi9bit_write(0, 0x02);
+ drv_spi9bit_write(1, 0x00);
- eos_spi9bit_write(0, 0x03);
- eos_spi9bit_write(1, 0x00);
+ drv_spi9bit_write(0, 0x03);
+ drv_spi9bit_write(1, 0x00);
- eos_spi9bit_write(0, 0x04);
- eos_spi9bit_write(1, 0x01);
+ drv_spi9bit_write(0, 0x04);
+ drv_spi9bit_write(1, 0x01);
- eos_spi9bit_write(0, 0x05);
- eos_spi9bit_write(1, 0x01);
+ drv_spi9bit_write(0, 0x05);
+ drv_spi9bit_write(1, 0x01);
- eos_spi9bit_write(0, 0x06);
- eos_spi9bit_write(1, 0x98);
+ drv_spi9bit_write(0, 0x06);
+ drv_spi9bit_write(1, 0x98);
- eos_spi9bit_write(0, 0x07);
- eos_spi9bit_write(1, 0x06);
+ drv_spi9bit_write(0, 0x07);
+ drv_spi9bit_write(1, 0x06);
- eos_spi9bit_write(0, 0x08);
- eos_spi9bit_write(1, 0x01);
+ drv_spi9bit_write(0, 0x08);
+ drv_spi9bit_write(1, 0x01);
- eos_spi9bit_write(0, 0x09);
- eos_spi9bit_write(1, 0x80);
+ drv_spi9bit_write(0, 0x09);
+ drv_spi9bit_write(1, 0x80);
- eos_spi9bit_write(0, 0x0A);
- eos_spi9bit_write(1, 0x00);
+ drv_spi9bit_write(0, 0x0A);
+ drv_spi9bit_write(1, 0x00);
- eos_spi9bit_write(0, 0x0B);
- eos_spi9bit_write(1, 0x00);
+ drv_spi9bit_write(0, 0x0B);
+ drv_spi9bit_write(1, 0x00);
- eos_spi9bit_write(0, 0x0C);
- eos_spi9bit_write(1, 0x01);
+ drv_spi9bit_write(0, 0x0C);
+ drv_spi9bit_write(1, 0x01);
- eos_spi9bit_write(0, 0x0D);
- eos_spi9bit_write(1, 0x01);
+ drv_spi9bit_write(0, 0x0D);
+ drv_spi9bit_write(1, 0x01);
- eos_spi9bit_write(0, 0x0E);
- eos_spi9bit_write(1, 0x05);
+ drv_spi9bit_write(0, 0x0E);
+ drv_spi9bit_write(1, 0x05);
- eos_spi9bit_write(0, 0x0F);
- eos_spi9bit_write(1, 0x00);
+ drv_spi9bit_write(0, 0x0F);
+ drv_spi9bit_write(1, 0x00);
- eos_spi9bit_write(0, 0x10);
- eos_spi9bit_write(1, 0xF0);
+ drv_spi9bit_write(0, 0x10);
+ drv_spi9bit_write(1, 0xF0);
- eos_spi9bit_write(0, 0x11);
- eos_spi9bit_write(1, 0xF4);
+ drv_spi9bit_write(0, 0x11);
+ drv_spi9bit_write(1, 0xF4);
- eos_spi9bit_write(0, 0x12);
- eos_spi9bit_write(1, 0x01);
+ drv_spi9bit_write(0, 0x12);
+ drv_spi9bit_write(1, 0x01);
- eos_spi9bit_write(0, 0x13);
- eos_spi9bit_write(1, 0x00);
+ drv_spi9bit_write(0, 0x13);
+ drv_spi9bit_write(1, 0x00);
- eos_spi9bit_write(0, 0x14);
- eos_spi9bit_write(1, 0x00);
+ drv_spi9bit_write(0, 0x14);
+ drv_spi9bit_write(1, 0x00);
- eos_spi9bit_write(0, 0x15);
- eos_spi9bit_write(1, 0xC0);
+ drv_spi9bit_write(0, 0x15);
+ drv_spi9bit_write(1, 0xC0);
- eos_spi9bit_write(0, 0x16);
- eos_spi9bit_write(1, 0x08);
+ drv_spi9bit_write(0, 0x16);
+ drv_spi9bit_write(1, 0x08);
- eos_spi9bit_write(0, 0x17);
- eos_spi9bit_write(1, 0x00);
+ drv_spi9bit_write(0, 0x17);
+ drv_spi9bit_write(1, 0x00);
- eos_spi9bit_write(0, 0x18);
- eos_spi9bit_write(1, 0x00);
+ drv_spi9bit_write(0, 0x18);
+ drv_spi9bit_write(1, 0x00);
- eos_spi9bit_write(0, 0x19);
- eos_spi9bit_write(1, 0x00);
+ drv_spi9bit_write(0, 0x19);
+ drv_spi9bit_write(1, 0x00);
- eos_spi9bit_write(0, 0x1A);
- eos_spi9bit_write(1, 0x00);
+ drv_spi9bit_write(0, 0x1A);
+ drv_spi9bit_write(1, 0x00);
- eos_spi9bit_write(0, 0x1B);
- eos_spi9bit_write(1, 0x00);
+ drv_spi9bit_write(0, 0x1B);
+ drv_spi9bit_write(1, 0x00);
- eos_spi9bit_write(0, 0x1C);
- eos_spi9bit_write(1, 0x00);
+ drv_spi9bit_write(0, 0x1C);
+ drv_spi9bit_write(1, 0x00);
- eos_spi9bit_write(0, 0x1D);
- eos_spi9bit_write(1, 0x00);
+ drv_spi9bit_write(0, 0x1D);
+ drv_spi9bit_write(1, 0x00);
- eos_spi9bit_write(0, 0x20);
- eos_spi9bit_write(1, 0x01);
+ drv_spi9bit_write(0, 0x20);
+ drv_spi9bit_write(1, 0x01);
- eos_spi9bit_write(0, 0x21);
- eos_spi9bit_write(1, 0x23);
+ drv_spi9bit_write(0, 0x21);
+ drv_spi9bit_write(1, 0x23);
- eos_spi9bit_write(0, 0x22);
- eos_spi9bit_write(1, 0x45);
+ drv_spi9bit_write(0, 0x22);
+ drv_spi9bit_write(1, 0x45);
- eos_spi9bit_write(0, 0x23);
- eos_spi9bit_write(1, 0x67);
+ drv_spi9bit_write(0, 0x23);
+ drv_spi9bit_write(1, 0x67);
- eos_spi9bit_write(0, 0x24);
- eos_spi9bit_write(1, 0x01);
+ drv_spi9bit_write(0, 0x24);
+ drv_spi9bit_write(1, 0x01);
- eos_spi9bit_write(0, 0x25);
- eos_spi9bit_write(1, 0x23);
+ drv_spi9bit_write(0, 0x25);
+ drv_spi9bit_write(1, 0x23);
- eos_spi9bit_write(0, 0x26);
- eos_spi9bit_write(1, 0x45);
+ drv_spi9bit_write(0, 0x26);
+ drv_spi9bit_write(1, 0x45);
- eos_spi9bit_write(0, 0x27);
- eos_spi9bit_write(1, 0x67);
+ drv_spi9bit_write(0, 0x27);
+ drv_spi9bit_write(1, 0x67);
- eos_spi9bit_write(0, 0x30);
- eos_spi9bit_write(1, 0x11);
+ drv_spi9bit_write(0, 0x30);
+ drv_spi9bit_write(1, 0x11);
- eos_spi9bit_write(0, 0x31);
- eos_spi9bit_write(1, 0x11);
+ drv_spi9bit_write(0, 0x31);
+ drv_spi9bit_write(1, 0x11);
- eos_spi9bit_write(0, 0x32);
- eos_spi9bit_write(1, 0x00);
+ drv_spi9bit_write(0, 0x32);
+ drv_spi9bit_write(1, 0x00);
- eos_spi9bit_write(0, 0x33);
- eos_spi9bit_write(1, 0xEE);
+ drv_spi9bit_write(0, 0x33);
+ drv_spi9bit_write(1, 0xEE);
- eos_spi9bit_write(0, 0x34);
- eos_spi9bit_write(1, 0xFF);
+ drv_spi9bit_write(0, 0x34);
+ drv_spi9bit_write(1, 0xFF);
- eos_spi9bit_write(0, 0x35);
- eos_spi9bit_write(1, 0xBB);
+ drv_spi9bit_write(0, 0x35);
+ drv_spi9bit_write(1, 0xBB);
- eos_spi9bit_write(0, 0x36);
- eos_spi9bit_write(1, 0xAA);
+ drv_spi9bit_write(0, 0x36);
+ drv_spi9bit_write(1, 0xAA);
- eos_spi9bit_write(0, 0x37);
- eos_spi9bit_write(1, 0xDD);
+ drv_spi9bit_write(0, 0x37);
+ drv_spi9bit_write(1, 0xDD);
- eos_spi9bit_write(0, 0x38);
- eos_spi9bit_write(1, 0xCC);
+ drv_spi9bit_write(0, 0x38);
+ drv_spi9bit_write(1, 0xCC);
- eos_spi9bit_write(0, 0x39);
- eos_spi9bit_write(1, 0x66);
+ drv_spi9bit_write(0, 0x39);
+ drv_spi9bit_write(1, 0x66);
- eos_spi9bit_write(0, 0x3A);
- eos_spi9bit_write(1, 0x77);
+ drv_spi9bit_write(0, 0x3A);
+ drv_spi9bit_write(1, 0x77);
- eos_spi9bit_write(0, 0x3B);
- eos_spi9bit_write(1, 0x22);
+ drv_spi9bit_write(0, 0x3B);
+ drv_spi9bit_write(1, 0x22);
- eos_spi9bit_write(0, 0x3C);
- eos_spi9bit_write(1, 0x22);
+ drv_spi9bit_write(0, 0x3C);
+ drv_spi9bit_write(1, 0x22);
- eos_spi9bit_write(0, 0x3D);
- eos_spi9bit_write(1, 0x22);
+ drv_spi9bit_write(0, 0x3D);
+ drv_spi9bit_write(1, 0x22);
- eos_spi9bit_write(0, 0x3E);
- eos_spi9bit_write(1, 0x22);
+ drv_spi9bit_write(0, 0x3E);
+ drv_spi9bit_write(1, 0x22);
- eos_spi9bit_write(0, 0x3F);
- eos_spi9bit_write(1, 0x22);
+ drv_spi9bit_write(0, 0x3F);
+ drv_spi9bit_write(1, 0x22);
- eos_spi9bit_write(0, 0x40);
- eos_spi9bit_write(1, 0x22);
+ drv_spi9bit_write(0, 0x40);
+ drv_spi9bit_write(1, 0x22);
- eos_spi9bit_write(0, 0xFF); // change to Page 7 CMD for GIP timing
- eos_spi9bit_write(1, 0xFF);
- eos_spi9bit_write(1, 0x98);
- eos_spi9bit_write(1, 0x06);
- eos_spi9bit_write(1, 0x04);
- eos_spi9bit_write(1, 0x07);
+ drv_spi9bit_write(0, 0xFF); // change to Page 7 CMD for GIP timing
+ drv_spi9bit_write(1, 0xFF);
+ drv_spi9bit_write(1, 0x98);
+ drv_spi9bit_write(1, 0x06);
+ drv_spi9bit_write(1, 0x04);
+ drv_spi9bit_write(1, 0x07);
- eos_spi9bit_write(0, 0x17);
- eos_spi9bit_write(1, 0x22);
+ drv_spi9bit_write(0, 0x17);
+ drv_spi9bit_write(1, 0x22);
- eos_spi9bit_write(0, 0x02);
- eos_spi9bit_write(1, 0x77);
+ drv_spi9bit_write(0, 0x02);
+ drv_spi9bit_write(1, 0x77);
- eos_spi9bit_write(0, 0x26);
- eos_spi9bit_write(1, 0xB2);
+ drv_spi9bit_write(0, 0x26);
+ drv_spi9bit_write(1, 0xB2);
- eos_spi9bit_write(0, 0xFF); // change to Page 0 CMD for normal command
- eos_spi9bit_write(1, 0xFF);
- eos_spi9bit_write(1, 0x98);
- eos_spi9bit_write(1, 0x06);
- eos_spi9bit_write(1, 0x04);
- eos_spi9bit_write(1, 0x00);
+ drv_spi9bit_write(0, 0xFF); // change to Page 0 CMD for normal command
+ drv_spi9bit_write(1, 0xFF);
+ drv_spi9bit_write(1, 0x98);
+ drv_spi9bit_write(1, 0x06);
+ drv_spi9bit_write(1, 0x04);
+ drv_spi9bit_write(1, 0x00);
- eos_spi9bit_write(0, 0x3A);
- eos_spi9bit_write(1, 0x70); // 24BIT
+ drv_spi9bit_write(0, 0x3A);
+ drv_spi9bit_write(1, 0x70); // 24BIT
- eos_spi9bit_write(0, 0x11);
- eos_sleep(120);
- eos_spi9bit_write(0, 0x29);
- eos_sleep(25);
+ drv_spi9bit_write(0, 0x11);
+ drv_sleep(120);
+ drv_spi9bit_write(0, 0x29);
+ drv_sleep(25);
- eos_spi_cs_clear();
+ drv_spi_cs_clear();
- return EOS_OK;
+ return DRV_OK;
}
void ili9806e_sleep(void) {
- eos_spi_cs_set();
+ drv_spi_cs_set();
- eos_spi9bit_write(0, 0x28);
- eos_sleep(10);
- eos_spi9bit_write(0, 0x10);
+ drv_spi9bit_write(0, 0x28);
+ drv_sleep(10);
+ drv_spi9bit_write(0, 0x10);
- eos_spi_cs_clear();
+ drv_spi_cs_clear();
}
void ili9806e_wake(void) {
- eos_spi_cs_set();
+ drv_spi_cs_set();
- eos_spi9bit_write(0, 0x11);
- eos_sleep(120);
- eos_spi9bit_write(0, 0x29);
+ drv_spi9bit_write(0, 0x11);
+ drv_sleep(120);
+ drv_spi9bit_write(0, 0x29);
- eos_spi_cs_clear();
+ drv_spi_cs_clear();
}
generated by cgit v1.2.3 (git 2.25.1) at 2025-02-22 15:57:21 +0000